tinyML Summit 2021

CTO, Syntiant

Stephen Bailey began his career at DEC developing one of the industry's first Ethernet NICs. He has led standards in IEEE, ANSI and IETF including iSCSI and iWarp and built record-breaking scale-out data storage solutions. He holds numerous patents, and has been involved in more than 80 chips and many million lines of deployed software. He was Broadcom Switch's senior strategic technologist until 2015, introducing Ethernet to service provider, wireless, data center and automotive networks and creating Broadcom's first Chinese architecture team to capture opportunities in China's rampant ICT explosion. He is founder and chief architect of ultra low power AI-at-the-edge chip provider Syntiant. He has a cum laude BS EE from Carnegie Mellon and a PhD CS from the University of Chicago.

Vice President, Samsung Advanced Institute of Technology

Changkyu Choi is a Vice President and the director of the Computer Vision Lab. at Samsung Advanced Institute of Technology (SAIT), Samsung Electronics. He received his Ph.D from Korean Advanced Institute of Science and Technology (KAIST) in 1999 for chaotic neural network with its application to bidirectional associative memory. He pioneered the development of biometrics on the Samsung's smartphones.

The innovations include partial fingerprint recognition on Galaxy smartphones in 2015 which was inevitable for the launch of 'Samsung Pay' service, and facial recognition for unlocking smartphones in 2017 which has changed the landscape of mobile biometrics industry.

Dr. Choi is the recipient of the Distinguished Paper Award at the SID International Symposium in 2010, the Best Oral Paper Award at the IEEE Consumer Electronics Conference in 2012, and the Industrial Service Medal from the Government or Republic of Korea in 2018.

Vertical Applications Manager, STMicroelectronics, STMicro

Matthieu Durnerin joined STMicroelectonics in 2002 with a background in telecommunication and a PhD in Signal Processing. After leading several activities on cellular telecommunication, audio, sensor hub, machine learning, he is now the head of the Artificial Intelligence Applications, Algorithms and Tools team in the Microcontroller and Digital ICs Group.

Sr. Director of Neural Processor Architecture, Samsung Semiconductor

Joseph Hassoun is Sr. Director of the Neural Processing Lab at Samsung Advanced Institute of Technology (SAIT), Samsung Electronics. Joseph led the architecture of NPUs for the last four years. The first implementation of NPUs at Samsung went into production in the Galaxy S10 phones. Before joining Samsung Semiconductor, he spent seven years at Nvidia’s architecture team, later driving the auto-grade Xavier System-on-chip (SOC) architecture. His career spans Xilinx’s Virtex FPGA architecture, Hewlett-Packard Enterprise’s server architecture, and several start-ups.

Joseph received MSEE degree from Stanford University and BSEE from the University of Michigan. He was awarded 15 patents in the fields of Computer Architecture and circuit design

Assistant Professor, MIT EECS

Song Han is an assistant professor at MIT EECS. Dr. Han received the Ph.D. degree in Electrical Engineering from Stanford advised by Prof. Bill Dally. Dr. Han's research focuses on efficient deep learning computing. He proposed “Deep Compression” and “ EIE Accelerator" that impacted the industry. His work received the best paper award in ICLR'16 and FPGA’17. He was the co-founder and chief scientist of DeePhi Tech which was acquired by Xilinx.

Staff Software Engineer, Google AI

Andrew Howard is a Staff Software Engineer at Google Research working on efficient computer vision models for mobile applications. He is the originator of Google’s popular MobileNet models. He received his PhD from Columbia University in computer science focusing on machine learning. Previous to Google he had a small computer vision startup and also worked at a large hedge fund.

Senior Principal Researcher, Microsoft Research

Prateek Jain is a senior principal researcher at Microsoft Research India. He is also an adjunct faculty member at the Computer Science department at IIT Kanpur. He received his PhD in Computer Science from University of Texas at Austin and his B.Tech. in Computer Science from IIT Kanpur. His research interests are in resource-constrained machine learning, high-dimensional statistics, and non-convex optimization. He has served on several senior program committees for top ML conferences and won ICML-2007, CVPR-2008 best student paper awards.

CEO, Qeexo

Sang is the CEO of Qeexo and co-founded the company in 2012. Sang has over 15 years of experience in IoT, mobile, and telecom. Throughout his career, Sang has been at the forefront of innovation in these industries, helping to bring to market new technology for the largest organizations in the ecosystem. At Samsung, Sang was responsible for planning next-generation products for the company. As a Mobile Device Product Manager at SK Telecom, Sang orchestrated the first international deal between a Korean telecommunications network operator and European handset manufacturers. Sang also spent time as a Technology Program Manager at HTC. He has an EE degree from POSTECH and an MBA from Haas School of Business at UC Berkeley.

Professor, Group Leader, Institute of Neuroinformatics, University of Zurich

Shih-Chii Liu received the BS degree in electrical engineering from MIT and the PhD degree in the Computation and Neural Systems program from Caltech. She worked in Silicon Valley before returning for her PhD. She is currently a professor at the University of Zurich, Switzerland and co-directs the Sensors group at the Institute of Neuroinformatics. Her group works on designs of low-power neuromorphic auditory and vision sensors, VLSI event-driven bio-inspired processing circuits, and more recently on event-driven deep neural networks and applications of these networks in artificial intelligent systems.

Dr. Liu is current Chair of the IEEE Swiss CAS/ED Society. She is the general co-chair of the upcoming 2020 IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS2020).

Professor, University of California, Berkeley

Kris Pister received his B.A. in Applied Physics from UCSD in 1986, and his M.S. and Ph.D. in Electrical Engineering from UC Berkeley in 1989 and 1992. From 1992 to 1997 he was an Assistant Professor of Electrical Engineering at UCLA where he helped developed the graduate MEMS curriculum and coined the phrase Smart Dust. Since 1996 he has been a professor of Electrical Engineering and Computer Sciences at UC Berkeley. In 2003 and 2004 he was on leave from UCB as CEO and then CTO of Dust Networks, a company he founded to commercialize wireless sensor networks. He participated in the creation of several wireless sensor networking standards, including Wireless HART (IEC62591), IEEE 802.15.4e, ISA100.11A, and IETF 6TiSCH. He has participated in many government science and technology programs, including DARPA ISAT and the Defense Science Study Group, and is currently a member of JASON. His research interests include MEMS, micro robotics, and low power circuits.

Research Area Manager, Augmented Hearing, Oticon

Dr. Niels H. Pontoppidan, Research Area Manager, Augmented Hearing Science, Eriksholm Research Centre, Oticon. Niels has been a part of Eriksholm Research Centre since 2005, when he came to the centre to apply his research in algorithms to make a difference for people with hearing impairment.

Tomas Edsö, Senior Principal Engineer, is currently acting as HW Tech Lead within the Arm machine learning group. Tomas joined Arm Sweden Lund in 2008 as one of the founding members of the video IPcompany Logipard, and has a wealth of knowledge within Video standards, digital signal compression and signal processing.

For the latter years, Tomas has transitioned into the machine learning group within Arm, where he has been part of designing as well as defining and scoping Arm NPU products.

Tomas holds a master’s degree in engineering physics from the University of Lund, with one additional year of scholarship studies in signal processing and artificial intelligence at the University of California, Irvine. Tomas currently holds 17 patents.

Distinguished Fellow, Magic Leap

Ashwin Swaminathan is Senior Director of Perception at Magic Leap where he leads the world sensing team. His team is responsible for research and productization of key computer vision features such as Simultaneous Localization and Mapping, Object detection, Visual Inertial Odometry, and Scene semantics.

Prior to joining Magic Leap, he was with Qualcomm Research in San Diego from 2008 to 2015. At Qualcomm Research, he was involved in various computer vision and machine learning projects for applications in augmented reality and context aware computing on mobile phones. In addition, he was involved in Qualcomm’s efforts in robotics and drones.

Ashwin holds a Ph.D. from the University of Maryland, College Park where he conducted research in several topics in image processing, multimedia forensics, security and watermarking. Ashwin holds 30+ patents in the field of computer vision, machine learning and Augmented Reality. He has authored 7 journal papers, 30+ conference papers with a combined 3200+ citations.

Principal Engineer, Qualcomm

Harris Teague is Principal Engineer at Qualcomm AI Research. Recently he has been focused on optimizing neural networks for execution on resource constrained devices. He team has developed methods for model compression and quantization that can be applied to many model types, reducing memory and/or compute required to execute the model on device. Prior to this, he worked on technology projects from autonomous drones to UMB (the precursor of LTE). He is inventor 60+ US patents and holds and engineering PhD from Stanford University.

Endowed Chair Professor, School of Electrical Engineering, KAIST

Hoi-Jun Yoo is the KAIST ICT Endowed Chair Professor, School of Electrical Engineering, KAIST. He was the VCSEL pioneer in Bell Communications Research at Red Bank, NJ. USA and Manager of DRAM design group at Hyundai Electronics designing from 1M DRAM to 256M SDRAM. Currently, he is a full professor of Department of Electrical Engineering at KAIST and the director of the System Design Innovation and Application Research Center (SDIA). From 2003 to 2005, he served as the full time Advisor to the Minister of Korean Ministry of Information and Communication for SoC and Next Generation Computing.

His current research interests are Bio Inspired AI Chip Design, Multicore AI-SoC design including DNN accelerators, Network on a Chip, Wearable Healthcare Systems, and high speed and low power memory. He has published more than 250 papers, and wrote or edited 5 books, "DRAM Design"(1997, Hongneung), “High Performance DRAM”(1999 Hongneung), "Low Power NoC for High Performance SoC Design"(2008, CRC), "Mobile 3D Graphics SoC"(2010, Wiley), and "BioMedical CMOS ICs"(Co-editing with Chris Van Hoof, 2010, Springer), and many chapters of books.

Dr. Yoo received Order of Service Merit from Korean government in 2011 for his contribution to Korean memory industry, Scientist/Engineer of this month Award from Ministry of Education, Science and Technology of Korea in 2010, Best Scholarship Awards of KAIST in 2011. He also received the Electronic Industrial Association of Korea Award for his contribution to DRAM technology in 1994, Hynix Development Award in 1995, the Korea Semiconductor Industry Association Award in 2002, Best Research of KAIST Award in 2007, and has been co-recipients of ASP-DAC Design Award 2001, Outstanding Design Awards of 2005, 2006, 2007, 2010, 2011, 2014 A-SSCC, Student Design Contest Award of 2007, 2008, 2010, 2011 DAC/ISSCC. He has served as a member of the executive committee of ISSCC, Symposium on VLSI, and A-SSCC. He also served as the IEEE SSCS Distinguished Lecturer ('10-'11) and the TPC chairs of ISSCC 2015, ISWC 2010 and A-SSCC 2008. He gave a plenary speech entitled "Intelligence on Silicon: From Deep Neural Network Accelerators to Brain-Mimicking AI-SoCs" at ISSCC 2019, and is an IEEE Fellow. .

MLPerf Inference Chair, Associate Professor in the John A. Paulson School of Engineering and Applied Sciences, Harvard University

Dr. Evgeni Gousev is a Senior Director of Engineering in Qualcomm Research. He leads HW R&D org in the Silicon Valley Center and is also responsible for developing ultra low power embedded computing platform, including always on machine vision AI technology. He has been with Qualcomm Technologies, Inc. since 2005 after joining from IBM T.J. Watson Research Center where he drove projects in the field of advanced silicon technologies.

From 1993 to 1998, Dr. Gousev held academic professorship appointments with Rutgers University and Hiroshima University (1997). Evgeni holds a M.S. degree in Applied Physics and a Ph.D. in Solid-State Physics. He has co-edited 24 books and published 163 papers and is an inventor on more than 60 issued and filed patents.

Pete Warden is the technical lead of the TensorFlow mobile and embedded team at Google, and was previously CTO of Jetpac (acquired in 2014).

Ian Bratt is a Distinguished Engineer at Arm, where he leads the Machine Learning Technology group within the ML business unit. Recently, Ian's team defined the architecture for Arm's family of Machine Learning Processors and has been responsible for multiple ML related improvements to the Arm IP roadmap.

Before working in machine learning, Ian worked as an architect on several generations of Arm Mali GPUs, during a high-growth period which culminated in Arm partners shipping over 1B Mali GPUs in 2016.

Prior to Arm, Ian worked at the pioneering multicore startup, Tilera. Ian has worked on NPUs, CPUs, GPUs, memory systems and SoC architecture. He holds an S.M. from MIT and has 23 granted US patents.

Kurt's research at University of California, Berkeley, focuses on computational problems in Deep Learning. In particular, Kurt has worked to reduce the training time of ImageNet to minutes and, with the SqueezeNet family, to develop a family of Deep Neural Networks suitable for mobile and IoT applications.

Before joining Berkeley as a Full Professor in 1998, Kurt was CTO and SVP at Synopsys. Kurt's contributions to Electronic Design Automation were recognized at the 50^th Design Automation Conference where he was noted as a Top 10 most cited author, as an author of a Top 10 most cited paper, and as one of only three people to have won four Best Paper Awards at that conference. Kurt was named a Fellow of the IEEE in 1996.

Boris Murmann is a Professor of Electrical Engineering at Stanford University. He joined Stanford in 2004 after completing his Ph.D. degree in electrical engineering at the University of California, Berkeley in 2003. From 1994 to 1997, he was with Neutron Microelectronics, Germany, where he developed low-power and smart-power ASICs in automotive CMOS technology. Since 2004, he has worked as a consultant with numerous Silicon Valley companies.

Dr. Murmann's research interests are in mixed-signal integrated circuit design, with special emphasis on sensor interfaces, data converters and custom circuits for embedded machine learning. In 2008, he was a co-recipient of the Best Student Paper Award at the VLSI Circuits Symposium and a recipient of the Best Invited Paper Award at the IEEE Custom Integrated Circuits Conference (CICC). He received the Agilent Early Career Professor Award in 2009 and the Friedrich Wilhelm Bessel Research Award in 2012.

He has served as an Associate Editor of the IEEE Journal of Solid-State Circuits, an AdCom member and Distinguished Lecturer of the IEEE Solid-State Circuits Society, as well as the Data Converter Subcommittee Chair and the Technical Program Chair of the IEEE International Solid-State Circuits Conference (ISSCC). He is the faculty director of the Stanford SystemX Alliance and Stanford's System Prototyping Facility. He is a Fellow of the IEEE.

Chris is a Silicon Valley entrepreneur and technologist, now co-founder and CEO of BabbleLabs, a deep learning technology company focused on speech. Most recently, he has led Cognite Ventures, a specialized analysis and investment company for deep learning start-ups. Prior to Cognite, he served as CTO for Cadence’s IP Group.

Chris joined Cadence after its acquisition of Tensilica, the company he founded in 1997 to develop extensible processors. He led Tensilica as CEO and later, CTO, to develop one of the most prolific embedded processor architectures.

Before that he was VP and GM of the Design Reuse Group at Synopsys. Chris was a pioneer in developing RISC architecture and helped found MIPS Computer Systems. He holds an MSEE and PhD in electrical engineering from Stanford and a BA in physics from Harvard. He holds more than 40 US and international patents. He was named an IEEE Fellow in 2015 for his work in development of microprocessor technology.

Marian Verhelst is an associate professor at the MICAS laboratories (MICro-electronics And Sensors) of the Electrical Engineering Department of KU Leuven, Belgium. Her research focuses on embedded machine learning, hardware accelerators, self-adaptive circuits and systems, and low-power embedded sensing and processing.

She received a Ph.D. from KU Leuven in 2008, was a visiting scholar at the Berkeley Wireless Research Center (BWRC) of UC Berkeley in 2005, and worked as a research scientist at Intel Labs, Hillsboro OR, from 2008 till 2011.

Marian is a member of the DATE conference executive committee and was a member of the ESSCIRC and ISSCC TPCs and of the ISSCC executive committee.

Marian is an SSCS Distinguished Lecturer, was a member of the Young Academy of Belgium an associate editor for TCAS-II and JSSC and a member of the STEM advisory committee to the Flemish Government. Marian currently holds a prestigious ERC Starting Grant from the European Union.

Edith Beigné joined Facebook Inc. in Menlo Park in November 2018 to lead the AR/VR Silicon Research team. Before that, she was with CEA-LETI, Grenoble, France, from 1998 to 2018 where she was the Research Director of Integrated Circuits and System Division. Since 2009, she has been a senior scientist in the digital and mixed-signal design lab where she focused on low power and adaptive circuit techniques, exploiting asynchronous design and advanced technology nodes like FDSOI 28nm and 14nm for many different applications from high performance MPSoC to ultra-low power IoT applications. Her main research interests today are low power digital and mixed-signal circuits and design with emerging technologies. She is part of ISSCC TPC since 2014 and part of VLSI’symposium since 2015. Distinguished Lecturer for the SSCS in 2016/2017, Women-in-Circuits Committee chair and JSSC Associate Editor since 2018. She visited Stanford University in 2018.

Ofer Dekel is a Microsoft Partner and a Principal Research Manager at Microsoft Research AI, where he manages the Machine Learning and Optimization research group. His current research interests include algorithms for resource-constrained ML inference, model compression techniques, and AI on microcontrollers. In the past, he has worked on a variety of research problems in statistical and online Machine Learning, Optimization, and Learning Theory.

Hoi-Jun Yoo is the KAIST ICT Endowed Chair Professor, School of Electrical Engineering, KAIST. He was the VCSEL pioneer in Bell Communications Research at Red Bank, NJ. USA and Manager of DRAM design group at Hyundai Electronics designing from 1M DRAM to 256M SDRAM. Currently, he is a full professor of Department of Electrical Engineering at KAIST and the director of the System Design Innovation and Application Research Center (SDIA). From 2003 to 2005, he served as the full time Advisor to the Minister of Korean Ministry of Information and Communication for SoC and Next Generation Computing.

His current research interests are Bio Inspired AI Chip Design, Multicore AI-SoC design including DNN accelerators, Network on a Chip, Wearable Healthcare Systems, and high speed and low power memory. He has published more than 250 papers, and wrote or edited 5 books, "DRAM Design"(1997, Hongneung), "High Performance DRAM"(1999 Hongneung), "Low Power NoC for High Performance SoC Design"(2008, CRC), "Mobile 3D Graphics SoC"(2010, Wiley), and "BioMedical CMOS ICs"(Co-editing with Chris Van Hoof, 2010, Springer), and many chapters of books.

Dr. Yoo received Order of Service Merit from Korean government in 2011 for his contribution to Korean memory industry, Scientist/Engineer of this month Award from Ministry of Education, Science and Technology of Korea in 2010, Best Scholarship Awards of KAIST in 2011. He also received the Electronic Industrial Association of Korea Award for his contribution to DRAM technology in 1994, Hynix Development Award in 1995, the Korea Semiconductor Industry Association Award in 2002, Best Research of KAIST Award in 2007, and has been co-recipients of ASP-DAC Design Award 2001, Outstanding Design Awards of 2005, 2006, 2007, 2010, 2011, 2014 A-SSCC, Student Design Contest Award of 2007, 2008, 2010, 2011 DAC/ISSCC. He has served as a member of the executive committee of ISSCC, Symposium on VLSI, and A-SSCC. He also served as the IEEE SSCS Distinguished Lecturer ('10-'11) and the TPC chairs of ISSCC 2015, ISWC 2010 and A-SSCC 2008. He gave a plenary speech entitled “Intelligence on Silicon: From Deep Neural Network Accelerators to Brain-Mimicking AI-SoCs” at ISSCC 2019, and is an IEEE Fellow.

Wei Xiong is the head of Samsung Display's USA R&D Lab, with focus on developing silicon IP, image processing algorithms, ML software, and industry standards.

As a scientist in Alibaba Computing Research Lab, Yu is responsible for forward-looking R&D in low-power, low-cost SoCs for IoT edge computing deployment at scale, which complements cloud computing to facilitate end-to-end & cloud-to-edge infrastructure.

He received the Ph.D. degree in electrical engineering from the Eindhoven University of Technology, Eindhoven, The Netherlands, in association with NXP Research, Eindhoven, in 2009. From 2009 to 2011, he was a research assistant professor with the University of Tokyo, Tokyo, Japan. From 2011 to 2012, he was a Research Scientist with the Accelerator Team, IBM Research Zurich, Switzerland. From 2012 to 2013, he was a Principal Scientist with NXP Research, where he led research in always-on processors in high-end mobile devices. From 2014 to 2018, he was with Qualcomm Research, San Diego, San Diego, CA, USA. He has been with Alibaba DAMO Academy USA since December 2018.

He has (co-)authored more 30 papers and hold over 20 patents. He is serving TPC members in many IEEE/ACM conferences and is currently the associate editor for IEEE Transactions on Circuits and Systems (TCAS-I). He is adjunct professor in both Shanghai Jiaotong University (SJTU) and Zhejiang University (ZJU) in China.

Daniel Situnayake leads developer advocacy for TensorFlow Lite at Google. He co-founded Tiny Farms, the first US company using automation to produce insect protein at industrial scale. He began his career lecturing in automatic identification and data capture at Birmingham City University.

Ravishankar Sivalingam obtained his M.S. in Computer Science, M.S. in Electrical Engineering, and Ph.D. in Electrical Engineering from the University of Minnesota, Twin Cities, specializing in sparse modeling for computer vision. He was a founding member of the Computational Intelligence team at 3M Corporate R&D, Minnesota, where he applied machine learning and computer vision to applications in the diverse businesses operated by 3M, ranging from biometrics to dental & orthodontic products. He also worked at June Life, a startup bringing computer vision technology to the smart kitchen of the future.

Currently, Ravi develops ML algorithms for ultra-low power computer vision at Qualcomm AI Research, in Santa Clara, CA.

Wei is the principal evangelist for Arm AI ecosystem. She has a breadth of hands-on expertise in AI, IoT and Mobile, and also extensive experience foresting new developer communities. Wei has a passion to work with partners and developers, and bring them the frictionless developer experience.

Prior to Arm, Wei worked for Samsung Mobile and Samsung Semiconductor, covering different roles ranging from developer evangelist, to engineering manager.

Edith Beigné joined Facebook Inc. in Menlo Park in November 2018 to lead the AR/VR Silicon Research team. Before that, she was with CEA-LETI, Grenoble, France, from 1998 to 2018 where she was the Research Director of Integrated Circuits and System Division. Since 2009, she has been a senior scientist in the digital and mixed-signal design lab where she focused on low power and adaptive circuit techniques, exploiting asynchronous design and advanced technology nodes like FDSOI 28nm and 14nm for many different applications from high performance MPSoC to ultra-low power IoT applications. Her main research interests today are low power digital and mixed-signal circuits and design with emerging technologies. She is part of ISSCC TPC since 2014 and part of VLSI’symposium since 2015. Distinguished Lecturer for the SSCS in 2016/2017, Women-in-Circuits Committee chair and JSSC Associate Editor since 2018. She visited Stanford University in 2018.

Wei Xiong is the head of Samsung Display's USA R&D Lab, with focus on developing silicon IP, image processing algorithms, ML software, and industry standards.

Amey Naik holds a master's degree in Electrical Engineering from University of Minnesota with specialization in design and implementation of signal processing algorithms. Currently he is a Design engineer at Apple in the SoC team. Prior to that, he has worked at Silicon Labs in IoT (Internet of Things) division and at Broadcom in MCU-Wireless division. He is passionate about energy efficient low power design.

Jinwon Lee is a Senior Staff Engineer at the Qualcomm AI Research lab where he designs state-of-the-art deep learning models for the edge devices. He received his Ph.D in Computer Science from Korea Advanced Institute of Science and Technology (KAIST) in 2009. Jinwon is currently focused on deep learning model optimizations for the edge devices including kernel/graph compiler optimization, model compression/quantization, and HW-aware neural architecture search. Previously, he developed deep learning-based on-device speech enhancement/recognition engines for Qualcomm SoC. Also, he developed low-power context-aware engines for mobile use cases based on GPS, WiFi, and motion sensors.

Mitch Harwell is a Deep Learning Software Manager at NVIDIA based in Santa Clara. Mitch manages a global team developing compilers and system software for deep learning hardware.

Frans Sijstermans is vice-president at NVIDIA, where he is responsible for HW accelerator design for multimedia, security, and deep learning.

Geoffrey W. Burr received his Ph.D. in Electrical Engineering from the California Institute of Technology in 1996. Since that time, Dr. Burr has worked at IBM Research--Almaden in San Jose, California, where he is currently a Distinguished Research Staff Member. He has worked in a number of diverse areas, including holographic data storage, photon echoes, computational electromagnetics, nanophotonics, computational lithography, phase-change memory, storage class memory, and novel access devices based on Mixed-Ionic-Electronic-Conduction (MIEC) materials. Dr. Burr's current research interests involve AI/ML acceleration using non-volatile memory. Geoff is an IEEE Fellow (2020), and is also a member of MRS, SPIE, OSA, Tau Beta Pi, Eta Kappa Nu, and the Institute of Physics (IOP).

Manar El-Chammas received the B.E. degree in computer and communications engineering from the American University of Beirut, Lebanon, in 2004, and the M.S. and Ph.D. degree in electrical engineering from Stanford University, in 2006 and 2010, respectively, where his research focused on multi-GS/s time-interleaved ADCs. He joined Texas Instruments, in 2010, where he worked on high-speed and high-performance ADCs for wireless infrastructure, and was the design manager of the High Speed Data Converter group. He then joined Mythic as the Director of Analog Design, where he led the development of the core analog computation engine for neural networks. He recently joined an early stage stealth mode startup. He has been granted multiple patents in high-speed ADC design and mixed-signal computation. His research interests include highly linear sampling systems, ultra-low power data converter design, and efficient computation systems for machine learning.

Rajeev Madhavan is a founder and General Partner of Clear, where he focuses on early stage technology investments. Rajeev’s operational specialties are recruiting, software-oriented technology, product definition, sales acceleration, and scaling. He has been a venture investor in over 35 companies.

Prior to founding Clear in 2014, Rajeev founded three successful startups. The most recent, Magma Design Automation, became the 4th largest Electronic Design Automation company in the world under his leadership.

Rajeev served as Magma’s Chairman and CEO from when he co-founded the company in 1997 through its acquisition by Synopsys in February 2012 for $580 million. Magma was listed on Nasdaq in 2001 and was ranked as the 2nd fastest growing Technology Company in 2005 by Forbes. Magma provided core infrastructure software to mobile pioneers such as Apple, Qualcomm, and Samsung, which was used to design the core processors at the heart of the smartphone era.

Prior to founding Magma, Rajeev co-founded and served as President and CEO of Ambit Design Systems, which was acquired by Cadence in 1998 for $280 million. Rajeev also co-founded and served as Director of Engineering of LogicVision, Inc (IPO under LGVN, then acquired by Mentor). Rajeev is a recipient of the Red Herring Top Innovator award, the lifetime achievement award at NITK, India and various other awards.

Rajeev earned a bachelor’s degree in electronics and communication from KREC, Surathkal, India, and an M.S.E.E from Queen’s University, Ontario, Canada.

When Rajeev is not working he can be found with his wife and two children, trail running, tending to his rose gardens, or holding court with technologists figuring out what comes next.

Jae-sun Seo received his Ph.D. degree from the University of Michigan in 2010. From 2010 to 2013, he was with IBM T. J. Watson Research Center, where he worked on cognitive computing chip design for the DARPA SyNAPSE project. In January 2014, he joined Arizona State University as an assistant professor in the School of ECEE. His research interests are energy-efficient hardware design for deep learning and neuromorphic computing. During the summer of 2015, he was a visiting faculty at Intel Circuits Research Lab. He was a recipient of IBM Outstanding Technical Achievement Award and NSF CAREER Award.

Albert Wang is a Director at Qualcomm Ventures. His current investment areas are mobile, cloud, internet of things (IoT), and artificial intelligence (AI). Albert led the investments and currently serves as a board observer for AnyVision, AttackIQ, Avalanche, BlueStacks, Lookout, SiFive, SteelHouse and Workspot. Previously, Albert led the team’s investments in Gaikai (acquired by SONY), PLUMgrid, Bracket Computing (both acquired by VMware), MapR (acquired by HPE), Ineda (acquired by Intel), CurbSide (acquired by Rakuten), Cavendish Kinetics (acquired by Qorvo), and Ring (acquired by Amazon).

Prior to Qualcomm Ventures, Albert worked in various engineering and management roles in the wireless industry. Most recently, he worked at Lux Capital focusing on MEMS and nanotechnology startups. He also spent 4 years at Skyworks Solutions and managed the full lifecycle of several wireless chips that power the most popular smart phones today. Albert received his MBA from the UCLA Anderson School of Management, his Ph.D. in Electrical Engineering from the University of Cincinnati, and his B.Sc. in Electrical Engineering from Zhejiang University.

Joseph Wang received his BS degree in Physics from Peking University in 1990, MSEE and MS in Physics from University of Washington in 1996. From 1996 to 2004 he worked at Micron Technology as device and process integration engineer. His work focused on developing leading edge process technology for SRAM, DRAM and NAND Flash memories. In 2004 he joined Qualcomm CDMA Technology. His work focused on embedded memory technology solutions for mobile SOC and IOT applications. He is currently Senior Director of Engineering responsible for memory technology and specialty technologies including RF and IOT. His latest focus includes Compute-in-Memory. He is inventor of over 100 US patents.

Dr. Mike Pinelis is the President and CEO of Microtech Ventures, a global firm based in Birmingham, Michigan focused on venture capital, merchant banking, and M&A advisory services for MEMS, sensors, and microtechnology companies. Mike is also the President and CEO of MEMS Journal, an independent publication based in Southfield, Michigan that he founded in 2003 and grew to the current 34,800+ subscribers worldwide. Along with MEMS Journal, Mike has also developed a strategy and market research consulting practice focused on MEMS, sensors, and microsystems. He is the chairman and the main organizer of some of the leading industry conferences such as ADAS Sensors, Medical Wearables, MEMS Manufacturing, Automotive LIDAR, and Medical MEMS and Sensors.

Mike is an active angel investor and a limited partner in several venture capital and private equity funds. He is also an advisor and mentor to technology startups, including those participating in the Techstars Mobility accelerator in Detroit. Mike is a member of the Michigan Angel Fund (MAF), the largest angel group in Michigan with over 100 members. Mike is also a member of the Michigan Venture Capital Association (MVCA).

Mike is an active participant in the MEMS, sensors, and semiconductors industries and has been an advisor or partner with organizations such as SEMI, CVTA, GSA, MSIG, SMTA, IMAPS, SAE, SAA, and IEEE. He has a large social media network with 29,700+ direct connections on LinkedIn.

Prior to MEMS Journal, Mike served as Director of Business Development for ISD Technology Group in Mansfield, Massachusetts. Prior to that, Mike founded and was the CEO of MindCruiser, a company specializing in developing online intellectual property marketplaces that was sold to Akiva Corporation. Mike earned a Bachelor's degree in Engineering from Harvey Mudd College in Claremont, California, and Master's and PhD degrees in Electrical Engineering with a focus in MEMS and microfluidics at the University of Michigan in Ann Arbor..

Vidya Raman joined Sorenson Capital in 2019 and focuses on the firms early-stage technology practice. Vidya is passionate about working with entrepreneurs building lasting businesses that solve significant problems which also are inclusive in every way possible.

Prior to Sorenson Ventures, Vidya has built and grown enterprise businesses as a product leader in several industry verticals ranging from enterprise software, industrial IoT, networking and healthtech. Most recently, she led product management for Cloudera’s AI platform, where she was responsible for making AI at scale a reality for customers spanning industries such as autonomous driving, biotech, banking to governments. Prior experience includes eMeter (Sequoia-funded, acquired by Siemens), Silver Spring (Kleiner funded and IPO exit), and Medtronic (healthcare).

Her all-time favorite career accomplishment was to have found product-market fit without having to write a single additional line of code.

Vidya received her MBA from Duke University’s Fuqua School of Business, Masters in Biomedical Engineering from the University of Alabama at Birmingham and a Bachelor’s in Electronics and Telecommunication Engineering from Bangalore University.